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3.2.1.  Registers

The 64-bit PowerPC Architecture provides 32 general purpose registers,
each 64 bits wide.  In addition, the architecture provides 32
floating-point registers, each 64 bits wide, and several special
purpose registers.  All of the integer, special purpose, and
floating-point registers are global to all functions in a running
program.  The following table shows how the registers are used.

r0        Volatile register used in function prologs
r1        Stack frame pointer
r2        TOC pointer
r3        Volatile parameter and return value register
r4-r10    Volatile registers used for function parameters
r11       Volatile register used in calls by pointer and as an
          environment pointer for languages which require one
r12       Volatile register used for exception handling and glink code
r13       Reserved for use as system thread ID
r14-r31   Nonvolatile registers used for local variables

f0        Volatile scratch register
f1-f4     Volatile floating point parameter and return value registers
f5-f13    Volatile floating point parameter registers
f14-f31   Nonvolatile registers

LR        Link register (volatile)
CTR       Loop counter register (volatile)
XER       Fixed point exception register (volatile)
FPSCR     Floating point status and control register (volatile)

CR0-CR1   Volatile condition code register fields
CR2-CR4   Nonvolatile condition code register fields
CR5-CR7   Volatile condition code register fields

On processors with the VMX feature.

v0-v1     Volatile scratch registers
v2-v13    Volatile vector parameters registers
v14-v19   Volatile scratch registers
v20-v31   Non-volatile registers
vrsave    Non-volatile 32-bit register

출처 : http://publib.boulder.ibm.com/infocenter/aix/v6r1/index.jsp?topic=/com.ibm.aix.aixassem/doc/alangref/moving_special_reg.htm

Below, the instruction set for the PowerPC architecture is given. A lot of instructions were intentionally left out:

• Instructions for 64-bit Implementations Only
• Floating Point Instructions
• Supervisor-Level Instructions
• I/O-specific Instructions
• Instructions for Multiprocessor Support
• Trap / System Call Instructions

This leaves 107 instructions: the core PowerPC Instruction Set.

When following the links below, you will be taken to a page describing a (family of) instructions. Note that these descriptions are taken from the 64-bit version of the instruction set; bit numbering are different for some instructions on 32-bit implementations. The lab course software uses a 32-bit PowerPC emulator.

The mnemonics column shows all valid forms of an instruction; it also shows simplified mnemonics in italics.

출 처 : http://pds.twi.tudelft.nl/vakken/in1200/labcourse/instruction-set/

   Port Registers

1. Port Open-Drain Registers
 : The port open-drain register(PODR), indicates a normal or wired-OR configuration of the port pins.
 : Determines whethehr the corresponding pin is actively driven as an output or is an open-drain driver.
'0' -> The I/O pin is actively driven as an output.
'1' -> The I/O pin is an open-drain driver. As an output, the pin is driven active-low, otherwise it is three-stated.

2. Port Data Register (PDATx)

3. Port Data Direction Register (PDIRx)
 : Direction. Indicates whether a pin is used as an input or an output.
'0' -> The corresponding pin is an input or is bidirectional
'1' -> The corresponding pin is an output.

4. Port Pin Assignment Register (PPAR)
 : Dedicated enable. Indicates whether a pin is a general-purpose I/O or a dedicated peripheral pin.
'0' -> General-purpose I/O. The peripheral functions of the pin are not used.
'1' -> Dedicated peripheral function.

5. Port Special Options Register (PSORx)
 : Special-option. Determines whether a pin configured for a dedicated function uses option 1 or option 2.
'0' -> Dedicated peripheral function. Option 1
'1' -> Dedicated peripheral function. Option 2

 MPC8280 칩의 Intenal Memory Resources는 연속적인 메모리 블럭에 맵핑되어 진다. 그 크기는 256 Kbytes이다. 이 블럭의 위치는 전역 4-Gbyte 물리 메모리 공간에 256 Kbytes 해상도로 매핑되어 지는데, IMMR(Interal Memory Map Register) 레지스터에 명시된 곳에 위치한다. 즉 Base Address를 IMMR 레지스터를 이용하여 직접 지정할 수 있다.